What is IC Packaging Substrate?
An IC package substrate is a substrate used for integrated circuit packaging, also known as a package carrier or package backboard. The main role of the IC package substrate is to connect the chip pin and package the external pin, while providing electrical connection and mechanical support. IC packaging substrates are usually made of insulating materials, such as ceramic, resin substrates, etc.
IC packaging substrate plays a crucial role in modern electronic products, which directly affects the performance, power consumption, heat dissipation and other aspects of integrated circuits.
IC packaging substrate plays a crucial role in modern electronic products, which directly affects the performance, power consumption, heat dissipation and other aspects of integrated circuits.
01｜封装基板分类
IC packaging substrate can be classified according to different standards and characteristics, the following are some common packaging substrate classification:
By material:
Organic substrate: Use resin as substrate material, such as FR-4 substrate.
Ceramic substrate: Using ceramic as substrate material, it has excellent high-frequency characteristics and heat dissipation performance.
Metal substrate: The use of metal material as a substrate, with good heat dissipation performance.
Ceramic substrate: Using ceramic as substrate material, it has excellent high-frequency characteristics and heat dissipation performance.
Metal substrate: The use of metal material as a substrate, with good heat dissipation performance.
Classification by structure:
Single-sided substrate: A substrate with only one conductive layer.
Double-sided substrate: A substrate with two conductive layers, usually with pads or balls on both sides.
Multilayer substrate: Composed of multiple insulating and conductive layers for high-density packaging.
Double-sided substrate: A substrate with two conductive layers, usually with pads or balls on both sides.
Multilayer substrate: Composed of multiple insulating and conductive layers for high-density packaging.
Classification by package type:
BGA (Ball Grid Array) : Ball array package with pins connected to the substrate with spherical solder joints.
QFN (Quad Flat No-leads) : pin-less package, the pins are located on all sides of the package.
SIP (System in Package) : Multiple chips are packaged on the same substrate to form a package unit.
QFN (Quad Flat No-leads) : pin-less package, the pins are located on all sides of the package.
SIP (System in Package) : Multiple chips are packaged on the same substrate to form a package unit.
Classification by use:
High frequency substrate: Used in high frequency applications, requiring low transmission losses and good high frequency characteristics.
High-density interconnect substrate: Used for high-density packaging, requiring a compact pin layout and good signal integrity.
Heat dissipation substrate: Specially designed for high heat dissipation requirements of the package, with good heat dissipation performance.
High-density interconnect substrate: Used for high-density packaging, requiring a compact pin layout and good signal integrity.
Heat dissipation substrate: Specially designed for high heat dissipation requirements of the package, with good heat dissipation performance.
Classification by manufacturing process:
Rigid substrate: The conventional rigid substrate manufacturing process is used.
Flexible substrate: The flexible substrate manufacturing process is suitable for applications that require bending or folding.
Flexible substrate: The flexible substrate manufacturing process is suitable for applications that require bending or folding.
After the chip is designed and manufactured, it needs to be packaged and tested, and the IC packaging substrate is used for the IC packaging link, and then the PCB plug-in, patch and other processes.
Non-memory chip packaging substrate is mainly divided into logic chip packaging substrate, communication chip packaging substrate and sensor chip packaging substrate. The logic chip packaging substrate usually adopts FC-BGA/LGA/PBGA process, using BT materials and domestic high-performance PP materials; The communication chip packaging substrate generally adopts WB-BGA process and BT material. The sensor chip packaging substrate generally adopts the WB-CSP process and also uses BT material.
Memory chip packaging substrate is mainly divided into mobile memory chip packaging substrate, solid state memory chip packaging substrate, embedded memory packaging substrate and volatile memory chip packaging substrate. The mobile memory chip packaging substrate generally adopts WB-CSP process and BT material. The solid state memory chip packaging substrate, embedded memory packaging substrate and volatile memory chip packaging substrate generally adopt WB-BGA process, and also use BT material.
02｜IC packaging substrate industry chain
IC packaging substrate and corresponding applications are as follows: Mobile memory chip package board (corresponding to U disk), solid state memory chip package board (corresponding to solid state memory), embedded memory package board (corresponding to embedded memory), volatile memory chip package board (corresponding to dynamic memory), logic chip package board (corresponding to logic chip), communication chip package board (corresponding to SIM card, etc.), sensor chip seal Install the substrate (corresponding to fingerprint sensor, etc.).
The supply chain of integrated circuit (IC) packaging substrate companies includes two main links: raw materials and outsourced processing. Raw material procurement scope covers gold salt, copper clad plate, copper foil, polypropylene (PP), chemical materials, dry film, ink, etc. The outsourcing processing stage is entrusted to a third party to complete, including drilling, final inspection, flying needle detection and other technological processes.
The company's downstream customers are divided into memory customers (such as Baiwei) and packaging and testing customers (such as Huatian). The main requirements of the memory class customers are focused on the packaging substrate of the memory product, while the packaging test class customers need the packaging substrate for chip packaging testing. By working with these different types of customers, packaging substrate companies can meet the needs of different areas, expand market share and enhance competitiveness.
The company's downstream customers are divided into memory customers (such as Baiwei) and packaging and testing customers (such as Huatian). The main requirements of the memory class customers are focused on the packaging substrate of the memory product, while the packaging test class customers need the packaging substrate for chip packaging testing. By working with these different types of customers, packaging substrate companies can meet the needs of different areas, expand market share and enhance competitiveness.
Of the total cost of the chip package (excluding the chip cost), the proportion of Wire Bonding packaging substrates is about 40%-50%. The high-end Flip Chip package substrate accounts for a higher proportion of the total cost of the chip package, about 70%-80%.
The difference in the proportion of lead bonded package substrate and flip package substrate in the cost structure is mainly due to their different manufacturing processes, material costs and technical complexity. Choosing the right package can be balanced according to the specific application requirements and cost considerations to ensure that performance requirements are met while maximizing cost effectiveness.
The specific categories, examples and applications of IC packaging substrates in the industry are as follows:
IC package substrate can be divided into two categories according to the application field: one is the package substrate applied to analog chips, analog chips are mainly used for analog integrated circuits (analog ics). Typical analog chips include radio frequency module chips. The packaging substrate for this kind of chip is called the radio frequency module packaging substrate.
The other is the package substrate applied to the digital chip, the digital chip includes baseband chip, application processor chip, memory card chip, etc. These digital chips typically require highly integrated and high-performance packaging substrates. Common digital Chip packaging substrates include WBBGA (Wire Bond Ball Grid Array), WBCSP (Wire Bond Chip Scale Package), and FCBGA (Flip Chip Ball Grid) Array), FCCSP (Flip Chip Chip Scale Package), etc.
The other is the package substrate applied to the digital chip, the digital chip includes baseband chip, application processor chip, memory card chip, etc. These digital chips typically require highly integrated and high-performance packaging substrates. Common digital Chip packaging substrates include WBBGA (Wire Bond Ball Grid Array), WBCSP (Wire Bond Chip Scale Package), and FCBGA (Flip Chip Ball Grid) Array), FCCSP (Flip Chip Chip Scale Package), etc.
03｜IC packaging substrate process classification
The production of IC packaging substrate adopts two main process methods: Tenting (subtraction) process and mSAP (improved semi-addition) process.
The key to the Tenting process is to use methods such as etching to remove excess copper from the surface of the copy-clad plate, thereby forming the required conductive circuit. However, due to the limitation of the etching process, the line needs to retain a certain amount of base copper during the etching process to avoid the line being corroded. Therefore, the Tenting process is often difficult to make lines with line width/line spacing less than 30/30μm.
The key to the Tenting process is to use methods such as etching to remove excess copper from the surface of the copy-clad plate, thereby forming the required conductive circuit. However, due to the limitation of the etching process, the line needs to retain a certain amount of base copper during the etching process to avoid the line being corroded. Therefore, the Tenting process is often difficult to make lines with line width/line spacing less than 30/30μm.
The key to the mSAP process is to cover the unwanted wires with a dry film, and then thicken the copper on the ultra-thin copper foil of the coppered plate to form the required conductive wires. Then the unwanted lines are quickly removed by a flash etching process, and finally a complete conductive line is obtained. The mSAP process has the ability to produce products with line width/line spacing as small as 25/25μm and below.
The main processes of IC packaging substrate are as follows:
Issue baking: By removing moisture from the surface of the plate, stabilize the size of the substrate, reduce thermal stress, and ensure the stability of the subsequent process.
Pressing film: The photosensitive dry film is covered on the copper surface of the substrate to prepare for subsequent exposure and development.
Exposure: Using laser scanning technology to image directly on the substrate to form circuit patterns.
Development: The dry film of the exposed part is cured and the dry film of the unexposed part is removed by the developer treatment.
Copper plating: A layer of copper of a certain thickness is chemically plated on the surface of the copper foil to increase electrical conductivity.
Removing film: Using the film removing liquid to remove the dry film covered by the plate surface, exposing the copper foil that needs to be eroded back.
Etching: By rapid etching or ordinary etching process, the desired circuit pattern is formed.
AOI: Inspects etched lines with automated optical inspection technology to ensure quality.
Pressing: the copper foil, PP and copper clad plate are superimposed and bonded into one under high temperature and pressure to form a multi-layer plate.
Drilling: Drilling the copper-clad plate with a drill to prepare for the subsequent PTH process.
PTH: Plated through holes to form a conductive copper layer to realize the connection of double-sided copper foil.
Solderproof: Cover the solderproof paint material to protect the line from oxidation or contamination.
Gold plating: A layer of gold is plated on the gold finger or nickel surface to improve electrical conductivity and corrosion resistance.
Molding: The base plate is milled to standard dimensions by milling cutter.
OSP: Anti-oxidation treatment of brazing pad by degreasing agent.
Final inspection: Complete inspection of the finished product to ensure that the product meets the specifications.
Together, these processes make up the manufacturing process of the IC packaging substrate, and each step is critical and affects the quality and performance of the final product.
Issue baking: By removing moisture from the surface of the plate, stabilize the size of the substrate, reduce thermal stress, and ensure the stability of the subsequent process.
Pressing film: The photosensitive dry film is covered on the copper surface of the substrate to prepare for subsequent exposure and development.
Exposure: Using laser scanning technology to image directly on the substrate to form circuit patterns.
Development: The dry film of the exposed part is cured and the dry film of the unexposed part is removed by the developer treatment.
Copper plating: A layer of copper of a certain thickness is chemically plated on the surface of the copper foil to increase electrical conductivity.
Removing film: Using the film removing liquid to remove the dry film covered by the plate surface, exposing the copper foil that needs to be eroded back.
Etching: By rapid etching or ordinary etching process, the desired circuit pattern is formed.
AOI: Inspects etched lines with automated optical inspection technology to ensure quality.
Pressing: the copper foil, PP and copper clad plate are superimposed and bonded into one under high temperature and pressure to form a multi-layer plate.
Drilling: Drilling the copper-clad plate with a drill to prepare for the subsequent PTH process.
PTH: Plated through holes to form a conductive copper layer to realize the connection of double-sided copper foil.
Solderproof: Cover the solderproof paint material to protect the line from oxidation or contamination.
Gold plating: A layer of gold is plated on the gold finger or nickel surface to improve electrical conductivity and corrosion resistance.
Molding: The base plate is milled to standard dimensions by milling cutter.
OSP: Anti-oxidation treatment of brazing pad by degreasing agent.
Final inspection: Complete inspection of the finished product to ensure that the product meets the specifications.
Together, these processes make up the manufacturing process of the IC packaging substrate, and each step is critical and affects the quality and performance of the final product.
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Some of the images are quoted from the "Tiger said core" public number
Some of the images are quoted from the "Tiger said core" public number
